The present invention relates to the field of programming or configuring programmable integrated circuits. More specifically, the present invention provides a technique for preconditioning or predefining the outputs of a programmable integrated circuit before the integrated circuit is programmed or configured.
Programmable, or reconfigurable, integrated circuits are well known to those in the electronic art. Programmable integrated circuits include RAM memories, SRAM memories, EEPROM memories, Flash memories, programmable logic devices (PLDs), and many others. In particular, programmable logic devices are also well known to those in the electronic art. Such programmable logic devices are also commonly referred as PALs (Programmable Array Logic), PLAs (Programmable Logic Arrays), FPLAs (Field Programmable Logic Arrays), EPLDs (Erasable Programmable Logic Devices), EEPLDs (Electrically Erasable Programmable Logic Devices), LCAs (Logic Cell Arrays), FPGAs (Field Programmable Gate Arrays), and the like. Such devices are used in a wide array of applications where it is desirable to program standard, off-the-shelf devices for a specific application.
Programmable integrated circuits are programmed and reprogrammed (or reconfigured) to store particular data or perform a particular function. For example, EEPROMs may be programmed to store a data for a digital system. EEPROMs may be (electrically) erased and reprogrammed many times, as needed, to store different or additional data. Furthermore, serial EPROMs may be programmed to hold data for configuring PLDs. Serial EPROMs may be reprogrammed, as needed, for configuring the PLDs differently.
As a further example, PLDs are generally known in which many LABs are provided in a two-dimensional array. Further, PLDs have an array of intersecting signal conductors for programmably selecting and conducting logic signals to, from, and between the LABs. LABs contain a number of individual programmable logic elements (LEs) which provide relatively elementary logic functions such as NAND, NOR, and exclusive OR. PLDs are programmed to provide particular logic functions. PLDs may be reconfigured many times to provide additional or different logic functions.
While such programmable integrated circuits have met with substantial success, such devices also meet with certain limitations, especially during the programming of such devices. Programmable integrated circuits are typically reprogrammed in a reconfiguration mode. In the reconfiguration mode, data is inputted into the integrated circuit to indicate the configuration of the logic elements, LABs, interconnect, and other components. This data may be input in different forms such as parallel bits or serial bits. In the reconfiguration mode, the outputs (which may include bidirectional I/Os) of the device will typically be in undefined states. For example, the outputs (and I/Os) may be logic high, logic low, or even at high impedance.
Furthermore, since the user generally does not and cannot control the state of the outputs during reconfiguration mode, the programmable integrated circuit may potentially damage itself or other components when it is being configured.
In particular, when entering the reconfiguration mode, the outputs of the programmable integrated circuit may be in states, possibly undefined, that may conflict with the devices, sources, or other components that are coupled to those outputs. For example, during the reconfiguration mode, an output of the programmable integrated circuit may become shorted with another component, which may result in serious damage to the devices.
This problem may be especially significant in the situation of in-system programming (ISP). ISP programming is a technique where a programmable integrated circuit is configured or programmed while resident in the system (e.g., remains a component in a digital system). The programmable integrated circuit need not be removed from the circuit board. ISP programming allows greater flexibility when reprogramming programmable circuits. For example, the configuration information in a programmable circuit may be upgraded as needed without requiring the removal and installation of components, or disassembly of the system. In fact, the programmable circuit may be reconfigured while the rest of the system is in normal operation.
Potential problems, however, may arise when using ISP programming. For example, a programmable integrated circuit is resident on a printed circuit board (PCB) of a digital system. The programmable integrated circuit may even be soldered to the board. During ISP programming, the programmable integrated circuit will be programmed while it remains on the PCB. Thus, during ISP programming, the programmable integrated circuit may not be easily isolated or decoupled from the other components of the system. Hence, because the outputs may be at undefined or unexpected states, damage may result to the programmable integrated circuit itself or other components in the system.
As can be seen, an improved technique for configuring and programming programmable integrated circuits is needed, especially a technique where a user can specify the output and I/O states before configuring the device.